RE: [PWE3] 16 bit interpretation of sequence checking?

["Yaakov Stein" <yaakov_s at rad.com>]

> QUESTION 1:
> ==========
> Is "the packet passes the sequence number check" the same as 
> "the packet is in order" ? I.e, Should the 
> expected_sequence_number be updated if the sequence number i 0 ?

Passes the sequence number check == is in order == has not arrived
later than a packet sent earlier (although packets may be missing).

If the sequence number is zero, it is IMMEDIATELY incremented
before the test. After the test passes the expected sequence number
is incremented. If the test fails (i.e. the packet received was sent
earlier
than a packet previously received) then the epected number is not
incremented.
 
> QUESTION 2:
> ==========
> I enterpret this rather complex description above as a way to 
> map 16 bit behaviour into a 32 bit environment. As a hardware 
> designer I have a hard time convincing myself (and others) 
> that the above is equivalent to the following psueudo-code:
> 
>       diff = SeqNo - ExpNo;
>       if ((SeqNo=0) or (diff[15]=0) then OK;
>       else NOT_OK;
>       end if;
>       if OK then NewExpNo = (SeqNo=FFFF) ? 1 : SeqNo+1;
>       end if;
> 
> where all variables are 16 bit and count operations allow wrap-around.

You are have a hard time because it isn't the same.
You are checking for equality with the next packet number,
while the test in the draft is for equal OR AFTER the expected
sequence number.

Try thinking about it in the following way:

   if received = expected then
       treat packet as in-order 
       set expected = (received + 1) mod 2^16
   else
       calculate D = ( (expected-received) mod 2^16 ) - 2^15
       if D > 0 then
           packets expected, expected+1, ... received-1 have not been
received 
           set expected = (received + 1) mod 2^16
       else  
           late packet arrived
           do NOT update expected

Y(J)S


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