wdiff draft-martini-l2circuit-encap-mpls-00.txt draft-martini-l2circuit-encap-mpls-01.txt

Network Working Group Luca Martini
Internet Draft Nasser El-Aawar
Expiration Date: May August 2001 Giles Heron
Level 3 Communications, LLC.

Dimitri Stratton Vlachos

Daniel Tappan
Eric C. Rosen
Alex Hamilton
Jayakumar Jayakumar
Cisco Systems, Inc.

Steve Vogelsang
John Shirron
Toby Smith
Laurel Networks, Inc.

Andrew G. Malis
Vinai Sirkay
Vivace Networks, Inc.

November 2000

Dimitri Stratton Vlachos
Mazu Networks, Inc.

Kireeti Kompella
Juniper Networks

February 2001

Encapsulation Methods for Transport of Layer 2 Frames Over MPLS

draft-martini-l2circuit-encap-mpls-00.txt

draft-martini-l2circuit-encap-mpls-01.txt

Status of this Memo

This document is an Internet-Draft and is in full conformance with
all provisions of Section 10 of RFC2026.

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Abstract

This document describes methods for encapsulating the Protocol Data
Units (PDUs) of layer 2 protocols such as Frame Relay, ATM AAL5, or
Ethernet for transport across an MPLS network.

Table of Contents

1 Specification of Requirements .......................... 2 3
2 Introduction ........................................... 2 3 Optional Sequencing and/or Padding .....................
3 General encapsulation method ........................... 3
3.1 The Control Word ....................................... 3
3.1.1 Setting the sequence number ............................ 4
3.1.2 Processing the sequence number ......................... 5
3.2 MTU Requirements ....................................... 4 5 Protocol-Specific Issues
3.3 MPLS Shim EXP Bit Values ............................... 6
3.4 MPLS Shim TTL Values ................................... 6
4
5.1 Protocol-Specific Details .............................. 6
4.1 Frame Relay ............................................ 4
5.2 6
4.2 ATM .................................................... 4
5.2.1 8
4.2.1 ATM AAL5 CPCS-PDU Mode ................................. 8
4.2.2 ATM Cell Mode .......................................... 10
4.2.3 OAM Cell Support ....................................... 6
5.2.2 12
4.2.4 CLP Bit bit to MPLS label stack EXP Bit Mapping ............................. 7
5.3 bit mapping ............ 12
4.3 Ethernet VLAN .......................................... 7
5.4 12
4.4 Ethernet ............................................... 7
5.5 12
4.5 HDLC ( Cisco ) ......................................... 7
5.6 13
4.6 PPP .................................................... 8
6 13
5 Security Considerations ................................ 8
7 13
6 Intellectual Property Disclaimer ....................... 8
8 13
7 References ............................................. 13
8
9 Author Information ..................................... 9 14

1. Specification of Requirements

The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT",
"SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this
document are to be interpreted as described in RFC 2119

2. Introduction

In an MPLS network, it is possible to carry the Protocol Data Units
(PDUs) of layer 2 protocols by prepending an MPLS label stack to
these PDUs. This document specifies the necessary encapsulation
procedures for accomplishing this. The One possible control protocol methods are
method is described in [5]. [1]. QoS related issues are not discussed in
this draft.

3. Optional Sequencing and/or Padding

Sometimes it is important to guarantee that sequentiality is
preserved on a For the purpose of this document R1 will be defined as
the ingress LSR, and R2 as the egress LSR. A layer 2 virtual circuit. To accommodate this
requirement, we provide an optional control word which may appear
immediately after PDU will be
received at R1, encapsulated at R1, transported, decapsulated at R2,
and transmitted out of R2. In a similar way, the "VC label" is
defined as the label at the bottom of the label stack and immediately before used to
transmit the layer 2 PDU. This control word contains a sequence number. R1 and R2 both
need

3. General encapsulation method

When transporting layer 2 protocols over MPLS it is, in most cases,
not necessary to transport the layer 2 encapsulation across the MPLS
network. In most cases the layer 2 header can be configured stripped at R1, and
reproduced at R2 with the knowledge help of whether some extra encapsulation
information, some of which is a priori signaled, and some of which
may be carried in the control word
will described below.

3.1. The Control Word

There are three requirements that may need to be used for a specific virtual circuit.

Sometimes it is necessary satisfied when
transporting layer 2 protocols over MPLS:
-i. Sequentiality may need to transmit a small packet be preserved.
-ii. Small packets may need to be padded in order to be
transmitted on a medium where there is a the minimum transport unit is
larger than the actual packet size. In this case, padding is appended to
-iii. Control bits carried in the packet. When header of the VC
label is popped, it layer 2 frame may be desirable
need to remove the padding before
forwarding the packet.

To facilitate this, the be transported.

The control word has a length field. If the
packet's length (without any padding) defined here addresses all three of these
requirements. For some protocols this word is less than 256 bytes, the
length field MUST be set to REQUIRED, and for
others OPTIONAL.

In all cases the packet's length (without padding).
Otherwise the length field MUST egress LSR must be set to zero. The value aware of whether the
length field, if non-zero, can ingress
LSR will send a control word over a specific virtual circuit. This
may be used to remove any padding. achived by configuration of the LSRs, or by signaling, for
example as defined in [1].

The generic control word is defined as follows:

In the above diagram the first 7 4 bits are reserved for future use.
They MUST be set to 0 when transmitting, and MUST be ignored upon
receipt.

The T bit next 4 bits provide space for carrying protocol specific flags.
These are defined in the protocol-specific details below.

The next 8 bits provide a length field, which is used in ATM encapsulations only, and as follows: If
the packet's length (defined as the length of the layer 2 payload
plus the length of the control word) is less than 256 bytes, the
length field MUST be set to zero for other encapsulations. The the packet's length. Otherwise the length byte is
field MUST be set as
specified above. to zero. The value of the length field, if non-
zero, can be used to remove any padding. When the packet reaches the
service provider's egress LSR, it may be desirable to remove the
padding before forwarding the packet.

The next 16 bits are the provide a sequence number that is can be used to
guarantee ordered packet delivery. For The processing of the sequence
number field is OPTIONAL.

The sequence number space is a 16 bit, unsigned circular space. The
sequence number value 0 is used to indicate an unsequenced packet.

3.1.1. Setting the sequence number

Given a given VC label, label V and a given pair of
LSRs, LSRs R1 and R2, where R2 has
distributed that VC label V to R1, R1. If R1 supports packet sequencing then the
following procedures should be used:

- the initial packet transmitted to label V MUST use sequence
number 1
- subsequent packets MUST increment the sequence number is initialized to 0. This is incremented by one for
each successive packet carrying that VC label which R1 transmits to
R2.

The

- when the transmit sequence number space is a reaches the maximum 16 bit unsigned circular space. PDUs
carrying
value (65535) the sequence number MUST wrap to 1

If the transmitting LSR R1 does not support sequence number
processing, then the sequence number field in the control word MUST NOT
be delivered set to 0.

3.1.2. Processing the sequence number

If an LSR R2 supports receive sequence number processing, then the
following procedures should be used:

When a VC label V is first distributed, the "expected sequence
number" associated with V MUST be initialized to 1

When a packet is received with label V the sequence number should be
processed as follows:
- if the sequence number on the packet is 0, then the packet passes
the sequence number check
- Otherwise if the packet sequence number >= the expected sequence
number (using an unsigned comparison, modulo 2**16), then the
packet is in order.
- otherwise the packet is out of order. They
may

If a packet passes the sequence number check, or is in order then, it
can be discarded delivered immediately. If the packet is in order, then the
expected sequence number should be set using the algorithm:

expected_sequence_number := packet_sequence_number + 1 mod 2**16
if (expected_sequence_number = 0) then expected_sequence_number := 1;

Packets which are received out of order MAY be dropped or reordered.

4. reordered
at the discretion of the receiver.

If an LSR R2 does not support receive sequence number processing,
then the sequence number field MAY be ignored.

3.2. MTU Requirements

The MPLS network should MUST be configured with an MTU that is at least 12
bytes larger then sufficient to
transport the largest frame size that will be transported in the
LSPs. Note that this is likely to be 12 or more bytes greater than
the largest frame size. If a packet length, once it has been
encapsulated on the ingress LSR, exceeds the LSP MTU, it MUST be
dropped. If an egress LSR receives a packet on a VC LSP with a
length, once the label stack and sequencing control word have been popped, that
exceeds the MTU of the destination layer 2 interface interface, it MUST be
dropped.

3.3. MPLS Shim EXP Bit Values

The ingress LSR, R1, SHOULD set the EXP field of the VC label to the
same value as the EXP field of the previous label in the stack (if in
fact a stack of more than one label is imposed at the ingress.) This
will ensure that the EXP field will be visible to the egress LSR, R2,
in the event of the packet having been penultimate hop popped.

3.4. MPLS Shim TTL Values

The ingress LSP, R1, MAY set the TTL field of the VC label to a value
of 2.

4. Protocol-Specific Issues

5.1. Details

4.1. Frame Relay

A Frame Relay PDU is transported in its entirety, including without the Frame Relay header. header or
the FCS. The sequencing control word is OPTIONAL. REQUIRED.

The BECN BECN, FECN, DE and FECN signals C/R bits are carried unchanged across the network in the Frame Relay header. These signals do not appear in the MPLS
header, and are unseen by the MPLS network.
control word. The Label Edge Routers edge LSRs that implement this document MAY, when
either adding or removing the encapsulation described herein, change a
the BECN and/or FECN bits from zero to a one in either or
both of these bits in order to reflect
congestion in the MPLS network that is known to the LERs. edge LSRs, and
the D/E bit from zero to one to reflect marking from edge policing of
the Frame Relay Committed Information Rate. The BECN BECN, FECN, and FECN D/E
bits MUST NEVER NOT be changed from one to zero.

The following is an example of a Frame Relay packet:

* B ( BECN ) Bit

The ingress LSR LSR, R1, MUST copy the BECN field from the incoming
Frame Relay header into this field. The egress LSR, R2, MUST
generate a new BECN field based on the value of the B bit.

* F ( FECN ) Bit

The ingress LSR, R1, MUST copy the FECN field from the incoming
Frame Relay header into this field. The egress LSR, R2, MUST
generate a new FECN field based on the value of the F bit.

* D ( DE ) Bit

The ingress LSR, R1, MUST copy the DE field from the incoming
Frame Relay header into this field. The egress LSR, R2, MUST
generate a new DE field based on the value of the D bit.

The ingress LSR, R1, MAY consider the DE bit of the Frame Relay
header when determining the value to be placed in the EXP fields field
of the MPLS label stack. In a similar way, the egress LSR LSR, R2,
MAY consider the EXP field of the VC label when queuing the
packet for egress.

5.2. Note however that frames from the same VC MUST
NOT be reordered by the MPLS network.

* C ( C/R ) Bit

The ingress LSR, R1, MUST copy the C/R bit from the received
Frame Relay PDU to the C bit of the control word. The egress
LSR, R2, MUST copy the C bit into the output frame.

The Label, EXP, S, and TTL fields are described in [2].

4.2. ATM

Two encapsulations are supported for ATM transport: one for ATM AAL5
CPCS-PDUs
and another for ATM cells.

The AAL5 CPCS-PDU encapsulation consists of the MPLS label stack, an optional sequencing a
REQUIRED control word, and the AAL5 CPCS-PDU.

The ATM cell encapsulation consists of an MPLS label stack, a required generic an
OPTIONAL sequencing control word, a 4 byte ATM cell header, and the
ATM cell payload payload.

4.2.1. ATM AAL5 CPCS-PDU Mode

In ATM AAL5 mode the ingress LSR is required to reassemble AAL5
CPCS-PDUs from the incoming VC and transport each CPCS-PDU as shown below: a
single packet. No AAL5 trailer is transported. The sequencing control
word is REQUIRED.

The EFCI and CLP bits are carried across the network in the control
word. The edge LSRs that implement this document MAY, when either
adding or removing the encapsulation described herein, change the
EFCI bit from zero to one in order to reflect congestion in the MPLS
network that is known to the edge LSRs, and the CLP bit from zero to
one to reflect marking from edge policing of the ATM Sustained Cell
Rate. The EFCI and CLP bits MUST NOT be changed from one to zero.

The AAL5 CPCS-PDU is prepended by the following header:

0 1 2 3
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| Reserved |T| VC Label | EXP |S| TTL |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| Rsvd |T|E|L|C| Length | Sequence Number |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| VPI ATM AAL5 CPCS-PDU | VCI
| PTI |C| " |
| " |
| " |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

Two transport modes are supported for ATM transport, VCC transport
and VPC transport.

VCC transport mode may be used to transport ATM Adaptation Layer 5
(AAL5) CPCS-PDUs, ATM cells, or both, across the VC LSP. The
sequencing control word is optional for VCC transport if only AAL5
CPCS-PDUs are to be transported. If ATM cells, or a combination of
ATM cells and AAL5 CPCS-PDUs, are to be transported the sequencing
control word is required.

VPC transport mode may only be used to transport ATM cells. The
sequencing control word is optional in VPC transport mode.

* T (transport type) bit

In VCC transport mode, bit

Bit (T) of the sequencing control word indicates whether the MPLS packet
contains an ATM cell or an AAL5 CPCS-PDU. If set the packet
contains an ATM cell, encapsulated according to the ATM cell mode
section below, otherwise it contains an AAL5 CPCS-PDU. In VPC transport The
ability to transportan ATM cell in the AAL5 mode is intended to
provide a means of enabling OAM functionality over the AAL5 VC.

* E ( EFCI ) Bit

The ingress LSR, R1, SHOULD set this bit MUST to 1 if the EFCI bit of
the final cell of those that transported the AAL5 CPCS-PDU is set
to 1, or if the EFCI bit of the single ATM cell to be transported
in the MPLS packet is set to 1. Otherwise this bit SHOULD be set
to 0. The egress LSR, R2, SHOULD set the EFCI bit of all cells
that transport the AAL5 CPCS-PDU to the value contained in this
field.

* VPI L ( CLP ) Bit

The ingress LSR, R1, SHOULD set this bit to 1 if the CLP bit of
any of the ATM cells that transported the AAL5 CPCS-PDU is set to
1, or if the CLP bit of the single ATM cell to be transported in
the MPLS packet is set to 1. Otherwise this bit SHOULD be set to
0. The egress LSR, R2, SHOULD set the CLP bit of all cells that
transport the AAL5 CPCS-PDU to the value contained in this field.

The ingress LSR, R1, MAY consider the CLP bit of the ATM cell
header when determining the value to be placed in the EXP fields
of the MPLS label stack. In both modes a similar way, the egress LSR, R2,
MAY consider the EXP field of the VC label when queuing the
packet for egress. Note however that frames from the same VC MUST
NOT be reordered by the MPLS network.

* C ( Command / Response Field ) Bit

When FRF.8.1 Frame Relay / ATM PVC Service Interworking [3]
traffic is being transported, the CPCS-UU Least Significant Bit
(LSB) of the AAL5 CPCS-PDU may contain the Frame Relay C/R bit.
The ingress LSR, R1, SHOULD copy this bit to the C bit of the
control word. The egress LSR, R2, SHOULD copy the C bit to the
CPCS-UU Least Significant Bit (LSB) of the AAL5 CPCS PDU.

The Label, EXP, S, and TTL fields are described in [2].

4.2.2. ATM Cell Mode

In this encapsulation mode ATM cells are transported individually
without a SAR process. Each ATM cell payload is prepended by a 4 byte
header and concatenated to form the MPLS frame. This ATM cell header
is defined as in the FAST encapsulation [4] section 3.1.1, but
without the trailer byte. The length of each frame, without the MPLS
header and the control word, is a multiple of 52 bytes long. The
maximum number of ATM cells that can be fitted in an MPLS frame, in
this fashion, is limited only by the MPLS network MTU and by the
ability of the egress LSR to process them. The ingress LSR MUST NOT
send more cells than the egress LSR is willing to receive. The number
of cells that the egress LSR is willing to receive may either be
configured in the ingress LSR or may be signaled, for example using
the methods described in [1]. The number of cells encapsulated in a
particular frame can be inferred by the frame length. The sequencing
control word is OPTIONAL. If the control word is used then the flag
bits in the control word are not used, and MUST be set to 0 when
transmitting, and MUST be ignored upon receipt.

The EFCI and CLP bits are carried across the network in the ATM cell
header. The edge LSRs that implement this document MAY, when either
adding or removing the encapsulation described herein, change the
EFCI bit from zero to one in order to reflect congestion in the MPLS
network that is known to the edge LSRs, and the CLP bit from zero to
one to reflect marking from edge policing of the ATM Sustained Cell
Rate. The EFCI and CLP bits MUST NOT be changed from one to zero.

This diagram illustrates an encapsulation of two ATM cells:

0 1 2 3
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| VC Label | EXP |S| TTL |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| Control word ( Optional ) |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| VPI | VCI | PTI |C|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| ATM Payload ( 48 bytes ) |
| " |
| " |
| " |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| VPI | VCI | PTI |C|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| ATM Payload ( 48 bytes ) |
| " |
| " |
| " |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

* VPI

The ingress router MAY MUST copy the VPI field from the incoming cell
into this field. The egress router MAY generate a new VPI based
on the value of the VC label and ignore the VPI contained in this
field.

* VCI

In VCC transport mode the

The ingress router MAY MUST copy the VCI field from the incoming ATM
cell header into this field and the field. The egress router MAY generate a
new VCI based on the value of the VC label.

When in VPC transport mode the ingress LSR MUST copy the VCI
field from the incoming cell into this field and the egress LSR
MUST copy the VCI from this field into the outgoing ATM cell
header.

* PTI & CLP

When present the ingress router SHOULD copy ( C bit )

The PTI and CLP fields are the PTI and CLP fields of the outgoing frame from the incoming
ATM cells. The cell header and the
egress router SHOULD set the left-most and EFCI bits headers of the PTI
in all outgoing cells to that contained in the PTI field of within the
FAST header and set packet are
the CLP bit ATM headers (without HEC) of outgoing cells to the CLP bit
contained in the FAST header. [7]

5.2.1. incoming cell.

4.2.3. OAM Cell Support

OAM cells MAY be transported on the VC LSP. A router that does not
support transport of OAM cells MUST discard incoming MPLS frames on
an ATM VC LSP that contain an ATM cell with the high-order bit of the
PTI field set to 1. A router that supports transport of OAM cells
MUST follow the procedures outlined in [7] [4] section 8 for mode 0 only,
in addition to the applicable procedures specified in [5].

A router that does not support transport of OAM cells across an LSP
may provide OAM support on ATM PVCs using the following procedures:

If an F5 end-to-end OAM cell is received from a VC by an LSR with a
loopback indication value of 1 and the LSR has a label mapping for
the VC, the LSR must decrement the loopback indication value and loop
back the cell on the VC. Otherwise the loopback cell must be
discarded by the LSR.

The LSR may optionally be configured to periodically generate F5
end-to-end loopback OAM cells on a VC. In this case, the LSR MUST
only generate F5 end-to-end loopback cells while a label mapping
exists for the VC. If the VC label mapping is withdrawn the LSR MUST
cease generation of F5 end-to-end loopback OAM cells. If the LSR
fails to receive a response to an F5 end-to-end loopback OAM cell for
a pre-defined period of time it must withdraw the label mapping for
the VC.

If an ingress LSR receives an AIS F5 OAM cell, fails to receive a
pre-defined number of the End-to-End loop OAM cells, or a physical
interface goes down, it MUST withdraw the label mappings for all VCs
associated with the failure. When a VC label mapping is withdrawn,
the egress LSR MUST generate AIS F5 OAM cells on the VC associated
with the withdrawn label mapping.

5.2.2. [1].

4.2.4. CLP Bit bit to MPLS label stack EXP Bit Mapping bit mapping

The ingress LSR MAY consider the CLP bit when determining the value
to be placed in the EXP fields of the MPLS label stack.

The egress LSR MAY consider This will
give the value MPLS network visibility of the EXP field of CLP bit. Note however that
cells from the same VC
label when determining the value of MUST NOT be reordered by the ATM CLP bit.

5.3. MPLS network.

4.3. Ethernet VLAN

For an ethernet Ethernet 802.1q VLAN the entire ethernet Ethernet frame without the
preamble or FCS is transported as a single packet. The sequencing
control word is OPTIONAL. If a packet the control word is received out of sequence it used then the flag
bits in the control word are not used, and MUST be dropped. set to 0 when
transmitting, and MUST be ignored upon receipt. The 4 byte VLAN tag
is transported as is, and MAY be overwritten by the egress LSR.

The ingress LSR MAY consider the user priority field [4] [5] of the VLAN
tag header when determining the value to be placed in the EXP fields
of the MPLS label stack. In a similar way, the egress LSR MAY
consider the EXP field of the VC label when queuing the packet for
egress. Ethernet packets containing hardware level CRC, Framing CRC errors,
framing errors, or runt packets MUST be discarded on input.

5.4.

4.4. Ethernet

For simple ethernet Ethernet port to port transport, the entire ethernet Ethernet frame
without the preamble or FCS is transported as a single packet. The
sequencing control word is OPTIONAL. If a packet the control word is received out of
sequence it used then
the flag bits in the control word are not used, and MUST be dropped. set to 0
when transmitting, and MUST be ignored upon receipt. As in the
Ethernet VLAN case, ethernet Ethernet packets with hardware level CRC, framing, CRC errors,
framing errors, and runt packets MUST be discarded on input.

5.5.

4.5. HDLC ( Cisco )

HDLC (Cisco) mode provides port to port transport of Cisco HDLC
encapsulated traffic. The HDLC PDU is transported in its entirety,
including the HDLC address, control and protocol fields, but
excluding HDLC flags and the FCS. Bit stuffing is undone. The
sequencing control word is OPTIONAL.

5.6.

4.6. PPP

PPP mode provides point to point transport of PPP encapsulated
traffic, as specified in [8]. [6]. The PPP PDU is transported in its
entirety, including the protocol field, but excluding any media-
specific framing information, such as HDLC address and control fields
or FCS. The sequencing control word is OPTIONAL.

5. Security Considerations

This document does not affect the underlying security issues of MPLS.

6. Intellectual Property Disclaimer

This document is being submitted for use in IETF standards
discussions.

7. References

[1] "LDP Specification", draft-ietf-mpls-ldp-11.txt ( work in
progress )

[2] ITU-T Recommendation Q.933, and Q.922 Specification for Frame
Mode Basic call control, ITU Geneva 1995

[3] "MPLS Label Stack Encoding", draft-ietf-mpls-label-encaps-08.txt
( work in progress )

[4] "IEEE 802.3ac-1998" IEEE standard specification.

[5] "Transport of Layer 2 Frames Over MPLS", draft-martini-
l2circuit-trans-mpls-04.txt.
l2circuit-trans-mpls-05.txt. ( work in progress )

[6] ITU Recommendation I.610, "B-ISDN operation and maintenance
principles and functions", 1999.

[7]

[2] "MPLS Label Stack Encoding", E. Rosen, Y. Rekhter, D. Tappan, G.
Fedorkow, D. Farinacci, T. Li, A. Conta. RFC3032

[3] "Frame Relay / ATM PVC Service Interworking Implementation
Agreement", Frame Relay Forum 2000.

[4] "Frame Based ATM over SONET/SDH Transport (FAST)," 2000.

[8]

[5] "IEEE 802.3ac-1998" IEEE standard specification.

[6] "The Point-to-Point Protocol (PPP)", RFC 1661.

[note1] FEC element type 128 is pending IANA approval.

8. Author Information

Luca Martini
Level 3 Communications, LLC.
1025 Eldorado Blvd.
Broomfield, CO, 80021
e-mail: luca@level3.net

Nasser El-Aawar
Level 3 Communications, LLC.
1025 Eldorado Blvd.
Broomfield, CO, 80021
e-mail: nna@level3.net

Giles Heron
Level 3 Communications
66 Prescot Street
London
E1 8HG
United Kingdom
e-mail: giles@level3.net

Dimitri Stratton Vlachos
Cisco Systems,
Mazu Networks, Inc.
250 Apollo
125 Cambridgepark Drive
Chelmsford, MA, 01824
Cambridge, MA 02140
e-mail: dvlachos@cisco.com d@mazunetworks.com

Dan Tappan
Cisco Systems, Inc.
250 Apollo Drive
Chelmsford, MA, 01824
e-mail: tappan@cisco.com

Jayakumar Jayakumar,
Cisco Systems Inc.
225, E.Tasman, MS-SJ3/3,
San Jose , CA, 95134
e-mail: jjayakum@cisco.com
Alex Hamilton,
Cisco Systems Inc.
285 W. Tasman , MS-SJCI/3/4,
San Jose, CA, 95134
e-mail: tahamilt@cisco.com

Eric Rosen
Cisco Systems, Inc.
250 Apollo Drive
Chelmsford, MA, 01824
e-mail: erosen@cisco.com

Steve Vogelsang
Laurel Networks, Inc.
2607 Nicholson Rd.
Sewickley, PA 15143
e-mail: sjv@laurelnetworks.com

John Shirron
Laurel Networks, Inc.
2607 Nicholson Rd.
Sewickley, PA 15143
e-mail: jshirron@laurelnetworks.com

Toby Smith
Laurel Networks, Inc.
2607 Nicholson Rd.
Sewickley, PA 15143
e-mail: tob@laurelnetworks.com

Andrew G. Malis
Vivace Networks, Inc.
2730 Orchard Parkway
San Jose, CA 95134
Phone: +1 408 383 7223
Email:
e-mail: Andy.Malis@vivacenetworks.com

Vinai Sirkay
Vivace Networks, Inc.
2730 Orchard Parkway
San Jose, CA 95134
e-mail: vinai.sirkay@vivacenetworks.com
Kireeti Kompella
Juniper Networks
1194 N. Mathilda Ave
Sunnyvale, CA 94089
e-mail: kireeti@juniper.net